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| ST16RF52 Smartcard MCU With 2048 Bytes EEPROM for Contactless/Contact Applications s s 8 BIT ARCHITECTURE CPU 22 K Bytes of USER ROM, SECTOR COMBINATIVE SYSTEM ROM 512 Bytes of RAM 2048 Bytes of EEPROM, SECTOR COMBINATIVE - Highly reliable CMOS EEPROM technology - 10 year data retention - 300,000 Erase/Write cycle endurance - Protected One Time Programmable block (32 or 64 bytes) - 1 to 32 bytes block either Erase or Write in single cycle programming Micromodule (D7) 4 4 4 4 s s s s s POWER SAVING STANDBY MODE VERY HIGH SECURITY FEATURES INCLUDING EEPROM FLASH ERASE ESD PROTECTION GREATER THAN 5000V 2 OPERATING CONFIGURATIONS - ISSUER - USER Wafer s s CONTACTLESS SPECIFIC FEATURES s COMPATIBLE WITH ISO 14443 TYPE B STANDARD s s s CONTACT SPECIFIC FEATURES s EXTENDED VOLTAGE OPERATION, Vcc Range: 2.7V to 5.5V s s 13.56 MHZ CARRIER FREQUENCY 106 KBIT/S DATA TRANSFER AMPLITUDE MODULATION READER TO CARD LOAD MODULATION CARD TO READER 3V OPERATION SERIAL ACCESS, ISO 7816-3 COMPATIBLE UP TO 5 MHz INTERNAL OPERATING FREQUENCY CONTACT ASSIGNMENT COMPATIBLE ISO 7816-2 s s s October 1999 This is Brief Data from STMicroelectronics. Details are subject to change without notice. For complete data, please contact your nearest Sales Office or SmartCard Products Divison, Rousset, France. Fax: (+33) 4 42 25 87 29 1/2 1 ST16RF52 DESCRIPTION The ST16RF52, a member of the standard ST16 device family, is a serial access microcontroller especially designed for large volume contactless/ contact Smartcard applications. The ST16RF52 is based on 8 bit CPU core and includes on chip memories: 512 Bytes of RAM, 22 KBytes of USER ROM, SYSTEM ROM, and 2048 Bytes of EEPROM. Both ROM and EEPROM memories can be configured into two sectors. Access rules from any memory section or sector to any other are set-up by the User's defined Memory Access Control Matrix (MACM). Reliability data related to the ST16RF52 product, manufactured using STMicroelectronics' advanced CMOS EEPROM technology, confirm data retention of up to 10 years and endurance up to 300,000 Erase/Write cycles. Contact operation is fully compatible with the ISO standards for Smartcard applications. Figure 1 Block Diagram VCC GENERATION RAM 8 BIT CPU SYSTEM ROM ROM 512 Bytes 22 KBytes SECTORS COMBIN. SECT. S SECT. A SECT. B EEPROM 2048 Bytes SECTORS COMBINATIVE SECTOR A SECTOR B MEMORY ACCESS CONTROL MATRIX CLK INTERNAL BUS RST SERIAL I/0 INTERFACE RF INTERFACE NUMBER GENERATOR SECURITY LOGIC V CC AC1 I/O1 AC0 GND SCP 076c/DS 2/2 |
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